The present invention relates broadly to an integrated circuit test apparatus, and in particular to the apparatus and method for testing circuit operation in an integrated circuit by modifying the normal state duty cycles in a repeating test cycle consisting of a sequence of many states to produce and observe a display which reflects circuit electrical characteristics during selectable states in the test cycle.
In the prior art, which is typified by U.S. Pat. No. 3,934,199, issued Jan. 20, 1976, a non-destructive method of testing electrical circuits on an integrated circuit utilizes a layer of liquid crystals over the circuit to provide visible indications in order that a comparison may be made between observed birefringent changes produced by the normally operating circuit. However, the prior art technique cannot be used to determine circuit node or conductor logic levels at any given instant in time during the testing sequence of a circuit. The set of logic levels present on various conductors in the circuit at a given instant in time which may be referred to as the circuit's state, binary state or digital state, most often constitute a set of binary digits which are stored or processed by the circuit. The ability to determine a circuit's state at many distinct instants in time is essential in failure analysis and design evaluation.
The present prior art test apparatus which utilized the liquid crystal technique requires that a comparison to the similar normally operating circuit be used in order to test for a faulty circuit. In other words, the prior art method operates upon observing the liquid crystal display of a good circuit and a bad circuit under the same normal excitation. What is actually observed is some pattern of light conductors on a dark background. While the observed patterns may be different for a good circuit and a bad circuit, the patterns, alone, provide no useful information about the many states the two circuits may assume at successive instants of time during their normal operation.
In fact at high clock rates (greater than 1,000 pulses/sec), a normally operating circuit may typically assume hundreds of states sequentially in time. The rate of progression from state to state is controlled by the input clock pulse rate and various other control inputs to the circuit. During this progression from state to state, there is a sequence of logic level changes on various conductors in the circuit which reflect the passing digital states. The overall response displayed in the liquid crystal (birefringent changes) is the result of an integration of these many changes over a long (.ltoreq.100 ms) time period. The liquid crystal molecules respond by rotating from their initial orientation under the influence of the local electric field according to a root-mean-square (RMS) fashion. The electric field strength in the liquid crystal depends on the logic levels which are present on conductors during many hundreds of states over a relatively large time period (.ltoreq.100 ms) of the normal circuit operation. Time resolution of these detailed changes in the circuit is lost in the integrating or averaging of the liquid crystal display mechanism when the circuit is operated at normal speed. If the clock pulse rate is slowed to visual rates (less than 10 pulses/sec) an effect can be observed which may be described as short flashes that may be seen in the liquid crystal display above conductors as logic levels change from 1 to 0 or 0 to 1. These flashes which last about one hundred thousands of a second, are very difficult to observe, and are not easily photographed. A determination of the logic state of the circuit 100 ms after a clock pulse has occurred by observation of the circuit display is truely impossible, since the display is no longer present. The eye simply cannot inspect the literally thousands of conductors which flash momentarily and die out in a very complex circuit. It is possible, however, to detect the presence or absence of such a flash over one or a very few particular conductors. By utilizing a good circuit, it may be possible to distinguish working and nonworking areas of the circuit. However, it is doubtful that the state of a very complex circuit with thousands of conductors could be determined by observing the flashing display, especially if the state of interest is assumed only after the application of hundreds of clock pulses. There are many types of complex circuits which simply do not operate with clock pulse frequencies of less than approximately 1,000 pulses per second. The present apparatus provides a direct static display which can be easily photographed and inspected at length to show the detailed differences between a single selected state and a reference state in a complex test state sequence. The present apparatus is used to produce static displays for many selected states with a single reference state. These static displays are recorded and compared to determine the differences between each selected state. When the set of conductor logic levels is known for the reference state, each static display shows directly the set of conductors which assume different logic levels in the selected and reference states, thus making possible a determination of the set of conductor logic levels of the selected state.